#stm32 #stm32f103 #stm32g0b1 #mcu #klipper #lcsc #sourcing #pcb #hardware-design #electronics
# Overview
Head-to-head of the two LQFP-48 STM32s you'd find on a Klipper board: the old-guard **STM32F103CBT6** ([LCSC C8304](https://www.lcsc.com/product-detail/C8304.html)) and the current-generation **STM32G0B1CBT6** ([LCSC C2847904](https://www.lcsc.com/product-detail/C2847904.html)). Both have 128 KB flash in the same 7×7 mm body. That's where the similarity ends.
Verdict:
- **G0B1CBT6 wins on everything that matters for a Klipper board.** It has 7× the RAM, FDCAN, USB and CAN usable at the same time (so it can be a USB-to-CAN bridge), a USB DFU bootloader in ROM, 44 I/O instead of 37, and a 1.7 V minimum supply.
- **F103CBT6 wins on price and stock today**: about ⅓ the price with 200× the LCSC stock, and it's marginally faster at raw stepping (1.07× in Klipper's benchmark).
- **They are not pin-compatible.** Not one of the 48 pins carries the same function on both. Moving between them is a new layout, not a part swap — see [[#Pinout]].
- **Best toolhead option found so far: STM32G0B1CCU7** (UFQFPN-48, [C29759424](https://www.lcsc.com/product-detail/C29759424.html)). It has **exactly the same pinout as the CBT6**, a smaller footprint, 256 KB flash and a 105 °C rating, for about $2.80 → $1.75. The catch is QFN assembly. See [[#UFQFPN-48 option — STM32G0B1CCU7]].
- **Sourcing flag:** the G0B1**CB**T6 is currently thin and expensive at LCSC. The **G0B1RBT6** (LQFP-64, [C5143679](https://www.lcsc.com/product-detail/C5143679.html)) is the same chip for ~⅓ the price with 8× the stock — roughly F103 money. It costs you board area. See [[#LQFP-64 alternative — STM32G0B1RBT6]].
Related: [[Klipper STM32 Family Comparison]] · [[STM32G0B1CBT6 LQFP-48 Layout Playbook]] · [[Klipper Compatible MCU Comparison]] · [[JLCPCB Design Notes]]
# Sourcing
LCSC listings as fetched 2026-09-23. Prices in USD per unit.
| | STM32F103CBT6 | STM32G0B1CBT6 | STM32G0B1CCT6 | STM32G0B1**RB**T6 | STM32G0B1**CCU7** |
|---|---|---|---|---|---|
| LCSC # | [C8304](https://www.lcsc.com/product-detail/C8304.html) | [C2847904](https://www.lcsc.com/product-detail/C2847904.html) | [C5270241](https://www.lcsc.com/product-detail/C5270241.html) | [C5143679](https://www.lcsc.com/product-detail/C5143679.html) | [C29759424](https://www.lcsc.com/product-detail/C29759424.html) |
| Package | LQFP-48 7×7 | LQFP-48 7×7 | LQFP-48 7×7 | **LQFP-64 10×10** | **UFQFPN-48 7×7** |
| Flash | 128 KB | 128 KB | 256 KB | 128 KB | 256 KB ¹ |
| Temp | −40…+85 °C | −40…+85 °C | −40…+85 °C | −40…+85 °C | **−40…+105 °C** |
| Stock | **12,981** | **64** | 82 | **505** | 282 |
| 1+ | $2.49 | $7.03 | $5.13 | **$2.79** | **$2.80** |
| 10+ | $2.17 | $6.23 | $4.66 | $2.37 | $2.41 |
| 30+ | $1.94 | $5.72 | $4.38 | $2.11 | $2.16 |
| 100+ | — | $5.23 | — | $1.77 | — |
| 250+ | $1.73 | — | $4.10 | — | $1.91 (260+) |
| 500+ | $1.63 | — | $3.97 | $1.65 | $1.80 (520+) |
| 1,000+ | $1.59 | — | $3.91 | **$1.60** | $1.75 (1,040+) |
| Packaging | 250 / tray | 250 / tray | tray | 160 / tray | 260 / tray |
| MSL | 3 | 3 | — | — | 3 |
| JLCPCB assembly | Economic + Standard | Economic + Standard | — | — | Economic + Standard, **extended** part |
1. LCSC's listing for C29759424 says 512 KB. That's wrong: in ST's part numbering, `C` = 256 KB (`B` = 128, `E` = 512).
- LCSC lists F103 lookalikes as alternatives: **CS32F103CBT7** (Chipsea, $1.44) and **CKS32F103CBT6** (CKS, $1.56). Klipper builds these as a plain F103; it only has a specific workaround for GigaDevice GD32F103 clones (the "Disable SWD at startup" option). ==Compatibility of the Chipsea/CKS clones under Klipper is unverified.==
- The G0B1CBT6 price looks like a thin-stock blip, not list price. ST's own eStore has the CCT6 at $5.96 at qty 1. ==Recheck before ordering; if it's still high, design with the CCT6 — it's the same die and pinout with double the flash.==
- The JLCPCB listings say parts bought into your JLCPCB parts library are held for PCBA only. With 64 in stock, **pre-buy G0B1s into your JLC library** before you commit a board order.
# LQFP-64 alternative — STM32G0B1RBT6
Same die, same 128 KB flash / 144 KB RAM, same Klipper build — just the 64-pin package. On LCSC ([C5143679](https://www.lcsc.com/product-detail/C5143679.html), fetched 2026-09-23) it's **$2.79 at qty 1 and $1.60 at 1,000, with 505 in stock**. That's about 40% of the CBT6's price, 8× its stock, and within a cent of the F103CBT6 at volume.
LCSC also lists the bigger-flash LQFP-64 parts, which are much pricier: RCT6 (256 KB) $5.82 with 120 in stock, and RET6 (512 KB) $6.80 with 335 in stock. So the RBT6 is the sweet spot, not a sign that LQFP-64 is cheap across the board.
## What changes vs. the LQFP-48 CBT6
Pin data from ST's `STM32G0B1R(B-C-E)Tx.xml` vs `STM32G0B1C(B-C-E)Tx.xml`.
| | G0B1CBT6 (LQFP-48) | G0B1RBT6 (LQFP-64) |
|---|---|---|
| Body / lead span | 7×7 mm / 9×9 mm | 10×10 mm / 12×12 mm (**~1.8× the footprint area**) |
| Pitch | 0.5 mm | 0.5 mm — same fanout rules |
| I/O | 44 | **60** |
| ADC ext. channels | 14 | **16** |
| Power pins | VBAT 4, VREF+ 5, VDD 6, VSS 7 | VBAT 6, VREF+ 7, VDD 8, VSS 9 — **still one VDD/VSS pair, VDDA still combined** |
| USB | PA11/PA12 on pins 33/34 | PA11/PA12 on pins 43/44 |
| FDCAN pin options | PA11/12, PB0/1, PB12/13, PB5/6, PB8/9, PD0/1 | all of those **plus PC2/PC3 (FDCAN2) and PC4/PC5 (FDCAN1)** — Klipper offers PC2/PC3; PC4/PC5 isn't in its menu |
| Klipper | STM32G0B1, 64 MHz, 8 KiB bootloader | **identical — same firmware binary** |
| Tray | 250 | 160 |
The power and decoupling scheme in [[STM32G0B1CBT6 LQFP-48 Layout Playbook]] carries over as-is (one pair, VREF+, VBAT, HSE on PF0/PF1), but every pin number changes. Re-derive the placement from the LQFP-64 pinout — don't reuse the 48-pin symbol.
## When to take the trade
- **Mainboard or any board with room:** take the RBT6. It's cheaper, more available and has more I/O, with nothing lost.
- **Toolhead board** (36/42 mm stepper-back form factor): the 12×12 mm footprint plus its fanout ring is the problem. It can fit, but it eats the space you'd use for driver, heater and connector routing. Check the placement before switching, or stay on LQFP-48 and buy CBT6/CCT6 stock ahead.
- **Either way,** 505 units isn't deep stock. Pre-buy into the JLCPCB parts library before committing an assembly order.
# UFQFPN-48 option — STM32G0B1CCU7
Same die again, in a leadless 7×7 mm QFN. [LCSC C29759424](https://www.lcsc.com/product-detail/C29759424.html) / [JLCPCB C29759424](https://jlcpcb.com/partdetail/STMicroelectronics-STM32G0B1CCU7/C29759424), fetched 2026-09-23: **$2.80 at qty 1, $1.75 at 1,040+, 282 in stock at LCSC**. JLCPCB lists it as an **extended** part with Economic and Standard assembly, MSL 3. ==JLCPCB's own stock count wasn't shown — check it before ordering.==
What the part number means: `C` = 256 KB flash, `U` = UFQFPN, `7` = −40…+105 °C. It's the only 48-pin G0B1 in this note that's cheap, and it's also the one with the most flash.
## vs. the LQFP-48 CBT6
| | G0B1CBT6 (LQFP-48) | G0B1CCU7 (UFQFPN-48) |
|---|---|---|
| Pinout | — | **identical**: all 48 positions match in ST's `STM32G0B1C(B-C-E)Ux.xml` vs `…Tx.xml` |
| Footprint | 9×9 mm lead span | **7×7 mm**, no leads (about 60% of the area) |
| Pitch | 0.5 mm | 0.5 mm |
| Exposed pad | none | **yes, centre pad** |
| Flash | 128 KB | 256 KB |
| Temp | −40…+85 °C | −40…+105 °C |
| Klipper | STM32G0B1 | **identical build** (Klipper links for 128 KB regardless) |
| LCSC 1+ / volume | $7.03 / $5.23 (100+) | **$2.80 / $1.75** |
Because the pinout is the same, the pin numbers and signal placement in [[STM32G0B1CBT6 LQFP-48 Layout Playbook]] still hold. What changes is the **package rules**:
- **Exposed pad → connect it to GND.** It isn't one of the 48 numbered pins, and ST's guidance is that on UFQFPN parts the pad "is not always connected to VSS internally", but should be tied to ground for EMC and heat. Don't count it as your VSS connection; pin 7 still is. ==Confirm what DS13560 says about the UFQFPN-48 pad specifically.==
- **Via-in-pad under the pad is now normal.** Use a few thermal/ground vias into L2, tented or filled so paste doesn't wick away, and a windowed stencil (roughly 50–70% paste coverage) so the part doesn't float. This reverses the playbook's "no thermal pad, no via-in-pad anywhere" line, for this package only.
- **Fanout is tighter.** The pads sit right at the body edge, with no lead length to escape through, so dog-bone vias go just outside the 7×7 outline. On a 6-layer board this is fine.
- **Inspection and rework:** no visible toe fillets, so joints are harder to inspect, and hand rework needs hot air instead of an iron. JLCPCB assembles QFN routinely; the risk is only in hand-building or reworking prototypes.
## Verdict
For a **toolhead or other tight board**, the CCU7 beats both LQFP options: it's smaller than the CBT6, keeps its pinout, is about 60% cheaper and has double the flash. For a **mainboard**, the RBT6 is still the easier build (leaded, no pad) at slightly lower volume pricing.
# Silicon
| | STM32F103CBT6 | STM32G0B1CBT6 | Edge |
|---|---|---|---|
| Core | Cortex-M3 | Cortex-M0+ | F103 (richer ISA: hardware divide, bitfield ops) |
| Max clock | 72 MHz | 64 MHz | F103 |
| Flash | 128 KB | 128 KB (CCT6: 256 KB) | tie |
| SRAM | 20 KB | **144 KB** (128 KB with parity) | **G0B1, 7.2×** |
| I/O (LQFP-48) | 37 | **44** | G0B1 |
| Supply | 2.0–3.6 V | **1.7–3.6 V** | G0B1 |
| Temp | −40…+85 °C | −40…+85 °C | tie |
| USB | FS device; 48 MHz only from HSE via PLL | FS **device + host**; crystal-less capable in silicon (HSI48 + CRS) | G0B1 |
| CAN | 1× bxCAN, **shares 512 B SRAM with USB — not both at once** | **2× FDCAN**, independent of USB | **G0B1** |
| ADC | 2× 12-bit, 1 µs; **10** ext. channels on LQFP-48 | 1× 12-bit, 0.4 µs, 16-bit oversampling; **14** ext. channels on LQFP-48 | G0B1 |
| DAC / comparators | — | 2× DAC, 3× comparators | G0B1 |
| USART / I2C / SPI | 3 / 2 / 2 | 6 (+ 2 LPUART) / 3 / 3 | G0B1 |
| USB-PD | — | 2× UCPD | G0B1 |
| ROM bootloader | USART only | USB DFU (plus serial interfaces) | **G0B1** |
| BOOT0 | dedicated pin 44 | shared with PA14/SWCLK; option-byte controlled | F103 (simpler) · G0B1 (frees a pin) |
| NRST | dedicated pin | PF2-NRST (can be GPIO) | G0B1 |
# Pinout
Pin data is from ST's own CubeMX database ([STM32_open_pin_data](https://github.com/STMicroelectronics/STM32_open_pin_data), `STM32F103C(8-B)Tx.xml` and `STM32G0B1C(B-C-E)Tx.xml`).
## What's structurally different
| | F103 LQFP-48 | G0B1 LQFP-48 |
|---|---|---|
| VDD / VSS pairs | **3** (23/24, 35/36, 47/48) + VDDA/VSSA (8/9) | **1** (6/7 — VDD/VDDA combined) |
| VREF+ | not bonded out (tied to VDDA) | **pin 5**, separate |
| VBAT | pin 1 | pin 4 |
| HSE | PD0/PD1, pins 5/6 | PF0/PF1, pins 8/9 |
| NRST | pin 7, dedicated | pin 10, PF2-NRST |
| BOOT0 | pin 44, dedicated | pin 36, shared with PA14 (SWCLK) |
| USB D−/D+ | PA11/PA12, pins 32/33 | PA11/PA12, pins 33/34 (remappable to PA9/PA10) |
| SWDIO / SWCLK | PA13/PA14, pins 34/37 | PA13/PA14, pins 35/36 |
| CAN pins | PA11/PA12 (shares the USB pins) or PB8/PB9 | FDCAN1: PA11/PA12, PD0/PD1, PB8/PB9 · FDCAN2: PB0/PB1, PB12/PB13, PB5/PB6 |
| Extra ports | — | PC6, PC7, PD0–PD3 |
| Pin-compatible? | **No** — zero of 48 pins match | |
For Klipper this matters twice over:
- **On F103, USB and CAN default to the same two pins.** A board that wants both has to remap CAN to PB8/PB9, and it still can't run them at once.
- **On G0B1, USB (PA11/PA12) and CAN on PB0/PB1 are separate.** That's the EBB36/42 arrangement, and what Klipper's USB-to-CAN bridge uses.
The G0B1 also has an **`…TxN` alternative pinout** (the "N" suffix, for USB-PD designs) that swaps pins 30/31 from PC6/PC7 to **VSS / VDDIO2**. The G0B1CBT6 is the standard pinout. Don't mix up the footprints/symbols.
## Full pin table
Power, clock, reset and boot pins in **bold**.
| Pin | STM32F103CBT6 | STM32G0B1CBT6 | G0B1 `…TxN` variant |
|---|---|---|---|
| 1 | **VBAT** | PC13 | — |
| 2 | PC13-TAMPER-RTC | PC14-OSC32_IN | — |
| 3 | PC14-OSC32_IN | PC15-OSC32_OUT | — |
| 4 | PC15-OSC32_OUT | **VBAT** | — |
| 5 | **PD0-OSC_IN** | **VREF+** | — |
| 6 | **PD1-OSC_OUT** | **VDD** | — |
| 7 | **NRST** | **VSS** | — |
| 8 | **VSSA** | **PF0-OSC_IN** | — |
| 9 | **VDDA** | **PF1-OSC_OUT** | — |
| 10 | PA0-WKUP | **PF2-NRST** | — |
| 11 | PA1 | PA0 | — |
| 12 | PA2 | PA1 | — |
| 13 | PA3 | PA2 | — |
| 14 | PA4 | PA3 | — |
| 15 | PA5 | PA4 | — |
| 16 | PA6 | PA5 | — |
| 17 | PA7 | PA6 | — |
| 18 | PB0 | PA7 | — |
| 19 | PB1 | PB0 | — |
| 20 | PB2 | PB1 | — |
| 21 | PB10 | PB2 | — |
| 22 | PB11 | PB10 | — |
| 23 | **VSS** | PB11 | — |
| 24 | **VDD** | PB12 | — |
| 25 | PB12 | PB13 | — |
| 26 | PB13 | PB14 | — |
| 27 | PB14 | PB15 | — |
| 28 | PB15 | PA8 | — |
| 29 | PA8 | PA9 | — |
| 30 | PA9 | PC6 | **VSS** |
| 31 | PA10 | PC7 | **VDDIO2** |
| 32 | PA11 | PA10 | — |
| 33 | PA12 | PA11 [PA9] / PA9 [PA11] | — |
| 34 | PA13 | PA12 [PA10] / PA10 [PA12] | — |
| 35 | **VSS** | PA13 | — |
| 36 | **VDD** | **PA14-BOOT0** | — |
| 37 | PA14 | PA15 | — |
| 38 | PA15 | PD0 | — |
| 39 | PB3 | PD1 | — |
| 40 | PB4 | PD2 | — |
| 41 | PB5 | PD3 | — |
| 42 | PB6 | PB3 | — |
| 43 | PB7 | PB4 | — |
| 44 | **BOOT0** | PB5 | — |
| 45 | PB8 | PB6 | — |
| 46 | PB9 | PB7 | — |
| 47 | **VSS** | PB8 | — |
| 48 | **VDD** | PB9 | — |
# Klipper
From Klipper master `src/stm32/` (commit `ce7002be`, 2026-09-18). Kalico handles both parts the same way; see [[Klipper STM32 Family Comparison#Kalico differences]] for where it diverges elsewhere.
| | STM32F103 | STM32G0B1 |
|---|---|---|
| Clock | 72 MHz (64 MHz on internal clock) | 64 MHz |
| Linker assumes | 64 KB flash / 20 KB RAM | 128 KB flash / 144 KB RAM |
| USB | yes — **crystal required** (no USB option with internal clock) | yes — **crystal required in practice** (Klipper clocks USB from the PLL, not HSI48) |
| CAN | bxCAN, PA11/PA12 or PB8/PB9 | FDCAN (as classic CAN) — on LQFP-48: PA11/PA12, PB0/PB1, PB12/PB13, PD0/PD1, PB8/PB9; PB5/PB6 as bridge side |
| USB-to-CAN bridge | **not offered** (blocked for all F1) | **yes** |
| Reboot to ROM DFU from host | no (ROM bootloader has no USB) | yes |
| Bootloader offsets | 2 / 4 / 8 / 16 / 20 / 28 / 32 / 34 / 36 / 64 KiB | 8 KiB |
| Step rate, 1 / 3 steppers | **1180K / 818K** | 1103K / 790K |
| Hardware PWM | yes | yes |
| Klipper since | 0.7.0 | 0.11.0 |
| Example boards | SKR Mini E3 v1.2–v2.0, Creality 4.2.x, Ender 3 V2, ~50 configs | SKR Mini E3 v3, Manta series, EBB36/42 v1.1+, EBB SB2209 |
The F103's step-rate lead is 7% — noise next to the RAM gap. 20 KB is enough for a stock Ender, but it caps move-queue depth, sensor buffering, and how many features you can switch on before running out. The G0B1 has headroom to spare.
# Decisions
| Scenario | Pick | Why |
|---|---|---|
| New Klipper board — mainboard or anything with room | **G0B1RBT6** (LQFP-64) | Same chip and firmware as the CBT6 at F103 money, better stock, +16 I/O |
| New Klipper board — toolhead / tight CAN node | **G0B1CCU7** (UFQFPN-48) | Same pinout as CBT6, smaller, 256 KB, ~$1.75–2.80; needs exposed-pad handling |
| Same, but must stay leaded (hand assembly / easy rework) | G0B1CBT6, or CCT6 if the CBT6 price/stock hasn't recovered | 7×7 mm LQFP body; currently pricey and thin at LCSC |
| Cheapest possible USB- or serial-only helper MCU, no CAN | F103CBT6 | ~$1.60 at volume and deep stock, but you're buying a 2007-era part with a crystal requirement and no USB bootloader. A G0B0 or G0B1 is usually still worth the delta. |
| Reworking an existing F103 board | Stay F103 | Not pin-compatible — a G0B1 means a relayout |
| Porting an F103 reference schematic to G0B1 | Redo power and boot from scratch | 3 VDD pairs → 1, VDDA disappears, VREF+ appears, BOOT0 moves onto SWCLK, HSE moves to PF0/PF1. See [[STM32G0B1CBT6 LQFP-48 Layout Playbook]]. |
# TODO
- ==Recheck G0B1CBT6 LCSC price/stock before the next order; if it's still above ~$3, switch the BOM to G0B1CCT6 (C5270241), or to G0B1RBT6 (C5143679) if the board has room for LQFP-64==
- ==Confirm JLCPCB carries C5143679 for assembly (not verified)==
- ==Check JLCPCB stock for C29759424 (G0B1CCU7) and pre-buy into the parts library==
- ==If adopting CCU7: add a UFQFPN-48 footprint with exposed pad and a via/stencil pattern to [[STM32G0B1CBT6 LQFP-48 Layout Playbook]]==
- ==Confirm JLCPCB basic vs extended status for both parts (extended adds a per-part loading fee)==
- ==Verify whether the Chipsea CS32F103 / CKS32F103 clones run Klipper cleanly==
# References
- [LCSC C5143679 — STM32G0B1RBT6](https://www.lcsc.com/product-detail/C5143679.html)
- [LCSC C29759424 — STM32G0B1CCU7](https://www.lcsc.com/product-detail/C29759424.html) · [JLCPCB C29759424](https://jlcpcb.com/partdetail/STMicroelectronics-STM32G0B1CCU7/C29759424)
- [ST Community — UFQFPN exposed pad connection (STM32L412K8)](https://community.st.com/t5/stm32-mcus-products/stm32l412k8-exposed-pad-question/td-p/644913)
- [LCSC C8304 — STM32F103CBT6](https://www.lcsc.com/product-detail/C8304.html) · [LCSC C2847904 — STM32G0B1CBT6](https://www.lcsc.com/product-detail/C2847904.html) · [LCSC C5270241 — STM32G0B1CCT6](https://www.lcsc.com/product-detail/C5270241.html)
- [JLCPCB C8304](https://jlcpcb.com/partdetail/STMicroelectronics-STM32F103CBT6/C8304) · [JLCPCB C2847904](https://jlcpcb.com/partdetail/STMicroelectronics-STM32G0B1CBT6/C2847904)
- [ST eStore — STM32G0B1CCT6](https://estore.st.com/en/stm32g0b1cct6-cpn.html)
- [ST STM32G0B1CB product page](https://www.st.com/en/microcontrollers-microprocessors/stm32g0b1cb.html) · [DS13560 — STM32G0B1 datasheet](https://www.st.com/resource/en/datasheet/stm32g0b1cc.pdf) · [STM32F103CB datasheet](https://www.st.com/resource/en/datasheet/stm32f103cb.pdf)
- [STM32_open_pin_data (ST CubeMX pin database)](https://github.com/STMicroelectronics/STM32_open_pin_data)
- [Klipper `src/stm32/Kconfig`](https://github.com/Klipper3d/klipper/blob/master/src/stm32/Kconfig) · [Klipper step benchmarks](https://www.klipper3d.org/Features.html)
- [[Klipper STM32 Family Comparison]]
- [[STM32G0B1CBT6 LQFP-48 Layout Playbook]]
- [[Klipper Compatible MCU Comparison]]
- [[JLCPCB Design Notes]]
# Changelog
## 2026-09-23
- Note created: LCSC and JLCPCB listings fetched for C8304, C2847904 and C5270241; pinouts from ST's STM32_open_pin_data; Klipper behaviour from master `ce7002be`
- Added the LQFP-64 STM32G0B1RBT6 (C5143679) as a sourcing alternative: price/stock column, package and pin comparison against the CBT6 from ST pin data, decision rows and TODOs
- Added the UFQFPN-48 STM32G0B1CCU7 (C29759424): sourcing column, pinout check (identical to LQFP-48 per ST data), exposed-pad rules, verdict and decision row; flagged LCSC's 512 KB listing error